PrimeRail培訓 |
培養對象 |
1.理工科背景,有志于數字集成電路設計工作的學生和轉行人員;
2.需要充電,提升技術水平和熟悉設計流程的在職人員;
3.集成電路設計企業的員工內訓。
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入學要求 |
學員學習本課程應具備下列基礎知識:
◆電路系統的基本概念。 |
班級規模及環境 |
為了保證培訓效果,增加互動環節,我們堅持小班授課,每期報名人數限3到5人,多余人員安排到下一期進行。 |
上課時間和地點 |
上課地點:【上!浚和瑵髮W(滬西)/新城金郡商務樓(11號線白銀路站) 【深圳分部】:電影大廈(地鐵一號線大劇院站)/深圳大學成教院
【北京分部】:北京中山學院/福鑫大樓 【武漢分部】:佳源大廈(高新二路) 【南京分部】:金港大廈(和燕路) 【成都分部】:領館區1號(中和大道)
最近開課時間(周末班/連續班/晚班): PrimeRail培訓開班時間:2024年1月8日 |
學時 |
◆課時: 共5天,30學時
◆外地學員:代理安排食宿(需提前預定)
☆注重質量
☆邊講邊練
☆合格學員免費推薦工作
☆合格學員免費頒發相關工程師等資格證書,提升您的職業資質
專注高端培訓15年,曙海提供的證書得到本行業的廣泛認可,學員的能力
得到大家的認同,受到用人單位的廣泛贊譽。
★實驗設備請點擊這兒查看★ |
最新優惠 |
◆團體報名優惠措施:兩人95折優惠,三人或三人以上9折優惠 。注意:在讀學生憑學生證,即使一個人也優惠500元。 |
質量保障 |
1、培訓過程中,如有部分內容理解不透或消化不好,可免費在以后培訓班中重聽;
2、培訓結束后免費提供半年的技術支持,充分保證培訓后出效果;
3、培訓合格學員可享受免費推薦就業機會。 ☆合格學員免費頒發相關工程師等資格證書,提升您的職業資質。專注高端培訓13年,曙海提供的證書得到本行業的廣泛認可,學員的能力得到大家的認同,受到用人單位的廣泛贊譽。 |
PrimeRail培訓 |
第一階段 |
Objectives
At the end of this workshop the student should be able to:
- Set up and perform Power/Ground (PG) reliability analysis for checking Static and Dynamic Voltage Drop and Electromigration (EM) potential violations
- Explanation of and/or set up the phases of Dynamic analysis of PrimeRail that involve the following:
- Library Characterization
- Data preparation
- Power Analysis
- PG Parasitic (RC) Extraction
- Dynamic (Transient) Rail Analysis
- Violation Viewing, Reporting and Correction
- What-if Analysis ? Package parasitics and Decap insertion
- Voltage Drop Derated Timing Analysis
- Accurate Hard Macro Modeling
- Power Management( power switch) Cell handling
- Set up PG analysis for hierarchical and top-level
- Use the PrimeRail graphical user interface (GUI) for the PG rail analysis, including what-if analysis
Audience Profile
????? Design, verification or CAD engineers who perform power/ground interconnect reliability analysis at the "Block" or "Full-Chip" levels. This covers a wide spectrum of designs of digital, memory, and analog/mixed signal.
Prerequisites
?????
Experience in the following areas is recommended to gain the most value from the workshop content:
- Physical layout
- Physical extraction
- Power simulation
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Static Analysis
- Introduction to Rail Analysis - requirements, capabilities and database preparation
- Power and Timing Model creation
- Power supply, net switching and Transition Time inputs
- Power and Rail Analysis
- Mapping, reporting, querying and what-if Analysis
- Integrated Flows - Hardmacro modeling, Power gating and Voltage derated timing analysis
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第二階段 |
Dynamic ( Transient) Analysis
- Introduction, database requirements and flows
- Library Characterization and LSF
- Cell-Level Dynamic Analysis-PP Run
- Cell-Level Dynamic Analysis-Transient Analysis
- What-if Analysis ? Package Parasitics and Decap Insertion
- Mapping, waveform viewing, reporting and querying
- Tx-Level Dynamic Analysis-Data Preparation
- Tx-Level Dynamic Analysis
- Tx-Level Signal EM Analysis
- Macro Modeling - Memory, Analog, custom or Hardmacro blocks
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